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VLSI for Embedded Intelligence

Proceedings of the 27th International Symposium, VDAT 2023

  • Conference proceedings
  • © 2025

Overview

Editors:
  1. Anu Gupta

    1. Department of Electrical and Electronics Engineering, Birla Institute of Technology and Scienc, Pilani, India

  2. Jai Gopal Pandey

    1. Central Electronics Engineering Research Institute, Pilani, India

  3. Nitin Chaturvedi

    1. Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani, India

  4. Devesh Dwivedi

    1. Manyata Embassy Business Park, GlobalFoundries, Bangalore, India

  • Constitutes the proceedings of the 27th International Symposium on VLSI Design and Test, VDAT 2023
  • Is organized in topical sections like Low-Power Integrated Circuits and Devices and System-Level Design
  • Includes research papers written by experts in the field

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 1210)

Included in the following conference series:

Conference proceedings info: VDAT 2023.

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About this book

This book constitutes the proceedings of the 27th International Symposium on VLSI Design and Test, VDAT 2023. The 32 regular papers and 16 short papers presented in this book are carefully reviewed and selected from 220 submissions. They are organized in topical sections as follows: Low-Power Integrated Circuits and Devices; FPGA-Based Design and Embedded Systems; Memory, Computing, and Processor Design; CAD for VLSI; Emerging Integrated Circuits and Systems; VLSI Testing and Security; and System-Level Design.


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Table of contents (29 papers)

  1. Front Matter

    Pages i-xx
    Download chapter PDF

  2. A Hybrid Approximate Adder for Energy-Efficient Computing

    • Vishesh Mishra, Cheena Singhal, Sparsh Mittal
    Pages 1-14

  3. Electronically Tunable Fractional-Order Universal Filter

    • Sadaf Tasneem, Rajeev Kumar Ranjan, Sajal K. Paul
    Pages 15-29

  4. Power Efficient Approximate Multiplier for Neural Network Applications

    • Uppugunduru Anil Kumar, Venkat Sai Arva, Chamundeswari Kottur, Abhishek Reddy Boppidi, Abudhagir Umar Syed, Sreehari Veeramachaneni et al.
    Pages 31-42

  5. Role of Active Layer Solvents on the Performance of Bulk Heterojunction (BHJ) Organic Solar Cells

    • Medha Joshi, Varun Kumar Singhal, Aditya Nath Bhatt, Upendra Kumar Verma, Brijesh Kumar
    Pages 43-51

  6. Parallel Feedback Controlled Low-Power and Reliable Schmitt Trigger Circuit

    • Raveesh Khola, Kaushal Kumar, Nitesh Kumar Dhale, Aryan Kannaujiya, Ambika Prasad Shah
    Pages 53-62

  7. Robust and High-Performance Digital In-Memory Computing in 5T Gain Cell Embedded DRAM

    • Kailash Prasad, Rajat Borkar, Joycee Mekie
    Pages 63-76

  8. Enhancing the Accuracy and Resource Utilization of Field Programmable CRC Circuit Architecture

    • B. Naresh Kumar Reddy, Sushmita Dandeliya, Degavath Uday Kiran, Korra Praveena, Srinivasulu Jogi
    Pages 77-86

  9. AFX-PE: Adaptive Fixed-Point Processing Engine for Neural Network Accelerators

    • Gopal Raut, Ritambhara Thakur, Pranose Edavoor, David Selvakumar
    Pages 87-104

  10. Optimized Composite Field-Based Hardware Architectures for AES S-Box Using Logic Decomposition Techniques

    • Ruby Mishra, Manish Okade, Kamalakanta Mahapatra
    Pages 105-116

  11. SPEEDY: SystemC-Based Design Space Exploration Framework for Embedded Systems

    • Radhika Dharwadkar, M. Balakrishnan
    Pages 117-130

  12. Indexed Fin Grids-Based Methodology to Address Process Variation Challenges of Self-aligned Quadruple Patterning

    • Vishal Rastogi, Mahima Satsangi, Deepak Karnatak, Sachin Shrivastava, Tapan Kumar Singh, Gilles Lamant
    Pages 131-140

  13. B-Box: An Efficient and Configurable RISC-V Bit Manipulation IP Generator

    • Simi Sukumaran, P S Babu, Tripti S Warrier, Neel Gala
    Pages 141-155

  14. Codriver: A Tool for Coverage-Driven Functional Verification of RISC-V Processors

    • Dikshant Yadav, Priyanka Bhagat, Pooja Beniwal, Sneh Saurabh
    Pages 157-169

  15. FPGA Implementation of Resource-Efficient Cube Calculation Architecture Using Yavadunam Sutra

    • Mansi Shukla, Anand Singh Thakur, Rohit Chaurasiya, Deepika Gupta
    Pages 171-184

  16. A Hybrid BAT Algorithm for Scheduling Droplet Mixing Operations in Digital Microfluidic Biochips

    • Riya Majumder, Amartya Dutta, Rajarshi Bhattacharya, Rajat Kumar Pal
    Pages 185-200

  17. LightLock: Ensuring Hardware IP Security in IoT Environment with Lightweight Logic Locking

    • Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
    Pages 201-214

  18. Indigenous Development of SPARC Processor-Based Radar Controller (SPRC) ASIC

    • Avadhesh Kumar, Jaimin Tanna, Pramod Mishra, Sarswati, Himanshu N. Patel, B. Saravana Kumar
    Pages 215-228

  19. A Walkthrough of Reconfigurable SV-UVM-Based MIPI Standard UniPro2.0 IP DV Test Bench: Challenges and Approaches

    • Piyush Tankwal, Arnab Ghosh, Piyush Agnihotri, Mukesh Gandhi, Parag S. Lonkar
    Pages 229-241

  20. Reducing Layout Design Cycle Iterations by Resizing and Splitting Electrically Violated Pins by Push Button

    • Neha Agrawal, Garima Batra, Abhishek Kumar, Hitesh Marwah
    Pages 243-256
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Other volumes

  1. VLSI for Embedded Intelligence

  2. Emerging VLSI Devices, Circuits and Architectures

Editors and Affiliations

  • Department of Electrical and Electronics Engineering, Birla Institute of Technology and Scienc, Pilani, India

    Anu Gupta

  • Central Electronics Engineering Research Institute, Pilani, India

    Jai Gopal Pandey

  • Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani, India

    Nitin Chaturvedi

  • Manyata Embassy Business Park, GlobalFoundries, Bangalore, India

    Devesh Dwivedi

About the editors

Prof. Anu Gupta received M.E and Ph.D. degrees from Birla Institute of Technology and Science (BITS) Pilani, in 1995 and 2003 respectively. In 1995, she joined BITS Pilani as an Assistant Lecturer. She was designated as Assistant Professor (in 2003), Associate Professor (in 2010), Professor (in 2016). She is an IEEE Senior member. Her research interests include low power, high performance analog/ digital/ mixed signal design for ASIC applications.

 

Dr. Jai Gopal Pandey has been working as a Principal Scientist in Council of Scientific and Industrial Research - Central Electronics Engineering Research Institute (CSIR-CEERI), Pilani, since 2005. He has received M.Tech. Degree in Electronics Design and Technology from U. P. Technical University, Lucknow, in 2003 and obtained Ph.D. in Electronics Engineering from Birla Institute of Technology and Science (BITS), Pilani, India in 2015. His research interests include high-performance architecture, SoCs, embedded systems, cryptography, and FPGA-based design. Dr. Pandey is an IETE Fellow, Senior Member of IEEE, and Life Member of the Semiconductor Society of India.

Dr. Nitin Chaturvedi is Associate Professor in the Department of Electrical & Electronics Engineering, Birla Institute of Technology and Science, Pilani. He has more than 15 years of experience in academia and has contributed several publications in National and International Journals in the area of microelectronics and VLSI design. His interests include high performance cache architectures, CMOS VLSI design, asynchronous circuit design, non-volatile architectures for energy harvesting, in-memory computing, low-power neuromorphic circuit design and hardware security.

Dr. Devesh Dwivedi is a distinguished professional, currently serving as the Director and India Site Leader at the Design Engineering Center of Excellence (CoE ) for GlobalFoundaries India. With a Ph.D. in Electronics Engineering from IIT BHU, Varanasi, Dr. Devesh has an impressive career spanning over 24 years in the industry. As a Senior IEEE Member, he has contributed significantly to the field with 70+ research publications, 15 US patents, and 2 trade secrets. He actively engages in various conferences, having chaired the IEEE CASS Bangalore Chapter. In the academic realm, Dr. Devesh is a respected visiting faculty member at IIT, NIT, and IIIT since 2012, holding the title of Distinguished Visiting Professor at IIT Roorkee. He has supervised 12 master's and 4 Ph.D. students and serves as a Board Member on the Industry-Academia Consulting Committee.

 

Accessibility Information

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This PDF does not fully comply with PDF/UA standards, but does feature limited screen reader support, described non-text content (images, graphs), bookmarks for easy navigation and searchable, selectable text. Users of assistive technologies may experience difficulty navigating or interpreting content in this document. We recognize the importance of accessibility, and we welcome queries about accessibility for any of our products. If you have a question or an access need, please get in touch with us at accessibilitysupport@springernature.com.

EPUB accessibility summary

This ebook is designed with accessibility in mind, aiming to meet the ePub Accessibility 1.0 AA and WCAG 2.0 Level AA standards. Its features include described images and other non-text content, screenreader-friendly navigation and accessible math. Math is represented either as MathML, LaTeX or in images. If math is represented as image, Alt Text might not be present. We recognize the importance of accessibility, and we welcome queries about accessibility for any of our products. If you have a question or an access need, please get in touch with us at accessibilitysupport@springernature.com.

Bibliographic Information

  • Book Title: VLSI for Embedded Intelligence

  • Book Subtitle: Proceedings of the 27th International Symposium, VDAT 2023

  • Editors: Anu Gupta, Jai Gopal Pandey, Nitin Chaturvedi, Devesh Dwivedi

  • Series Title: Lecture Notes in Electrical Engineering

  • DOI: https://doi.org/10.1007/978-981-97-3756-7

  • Publisher: Springer Singapore

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025

  • Softcover ISBN: 978-981-97-3755-0Published: 29 October 2024

  • eBook ISBN: 978-981-97-3756-7Published: 27 October 2024

  • Series ISSN: 1876-1100

  • Series E-ISSN: 1876-1119

  • Edition Number: 1

  • Number of Pages: XX, 396

  • Number of Illustrations: 51 b/w illustrations, 179 illustrations in colour

  • Topics: Circuits and Systems, Computer Systems Organization and Communication Networks

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