singlepulse and hwce unexpected reset

A bit register field flag as singlepulse in rif with hwce used can reset in unexpected way.
A single pulse bit is expected to be set on sw write 1.
A single pulse bit is expected to be reset on next hwce qualified clock.
A single pulse bit is NOT expected to be reset on sw write 0 (no reset until next hwce).
Current generated hw reset on sw write 0. This is the current issue.

pyrift FIX would be to enforced a woset behaviour on singlepulse bit. Having woset=True attribute to the singlepulse is a valid workaround at the moment.
To be defined, fix may be to enforce the woset when singlepulse is used ...