From 916f9358c296060ad71dd4d8c124668557615daa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Niederpr=C3=BCm?= Date: Fri, 8 Dec 2023 08:43:00 +0100 Subject: [PATCH] Fastino ramp: Store start, step, duration --- src/atomiq/components/sinara/dac.py | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/src/atomiq/components/sinara/dac.py b/src/atomiq/components/sinara/dac.py index 582d68d..4a828c8 100644 --- a/src/atomiq/components/sinara/dac.py +++ b/src/atomiq/components/sinara/dac.py @@ -41,7 +41,7 @@ class Fastino(DAC): self._fastino_device = fastino_device # variables for detecting parallel events - self.event_slots = np.array([-1]*32, dtype=np.int64) + self.event_slots = np.array([[-1]*3]*32, dtype=np.int64) self.event_slots_max_idx = -1 self.parallel_event_delay = parallel_event_delay @@ -56,31 +56,35 @@ class Fastino(DAC): pass @kernel - def register_event(self, time: TInt64) -> TFloat: + def register_ramp(self, time: TInt64, duration: TInt64, ramp_timestep: TInt64) -> TFloat: last_used = self.event_slots_max_idx first_free = last_used + 1 shift_needed = False for i in range(self.event_slots_max_idx,-1,-1): - event = self.event_slots[i] + item_starttime = self.event_slots[i][0] + item_duration = self.event_slots[i][1] + item_step = self.event_slots[i][2] # check if the time of the event already passed - if event < now_mu(): - self.event_slots[i] = -1 + if item_starttime + item_duration < now_mu(): + self.event_slots[i][0] = -1 if last_used == self.event_slots_max_idx: last_used = i first_free = i # check for collision with the new event - if event == time: + if item_starttime == time: shift_needed = True self.event_slots_max_idx = last_used if shift_needed: - return self.register_event(time + self.core.seconds_to_mu(self.parallel_event_delay)) + self.parallel_event_delay + return self.register_ramp(time + self.core.seconds_to_mu(self.parallel_event_delay), duration, ramp_timestep) + self.parallel_event_delay else: - self.event_slots[first_free] = time + self.event_slots[first_free][0] = time + self.event_slots[first_free][1] = duration + self.event_slots[first_free][2] = ramp_timestep if first_free >= last_used: self.event_slots_max_idx = first_free return 0.0 @@ -98,15 +102,16 @@ class FastinoChannel(DACChannel): This method implements a stupid ramp on an abstract level. This will most likely work but be slow. If your hardware has native support for ramping, please override this function when you inherit from VoltageSource """ + + n = int(duration / ramp_timestep) + ramp_timestep = duration / float(n) + if relocate_parallel: - offset = self.dac_device.register_event(now_mu()) + offset = self.dac_device.register_ramp(now_mu(), self.core.seconds_to_mu(duration), self.core.seconds_to_mu(ramp_timestep)) if offset > 0.0: self.experiment.log.warning(self.identifier + ": Found paralell ramp, delaying..") delay(offset) - n = int(duration / ramp_timestep) - ramp_timestep = duration / float(n) - for i in range(n): self._set_voltage(voltage_start + i * (voltage_end - voltage_start) / n, zero_time = True) delay(ramp_timestep) -- GitLab