TPS61240-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade
- TPS61240IDRVRQ1: grade 3, –40°C to +85°C ambient operating temperature
- TPS61240TDRVRQ1: grade 2, –40°C to +105°C ambient operating temperature
- Device HBM ESD classification level 2
- Device CDM ESD classification level C6
- Device temperature grade
- Functional Safety-Capable
- Efficiency > 90% at nominal operating conditions
- Total DC Output Voltage Accuracy 5 V ±2%
- Typical 30-µA quiescent current
- Best in class line and load transient
- Wide VIN range from 2.3 V to 5.5 V
- Output current up to 450 mA
- Automatic PFM/PWM mode transition
- Low ripple power save mode for improved efficiency at light loads
- Internal soft start, 250 µs typical start-up time
- 3.5-MHz typical operating frequency
- Load disconnect during shutdown
- Current overload and thermal shutdown protection
- Only three surface-mount external components required (one MLCC inductor, two ceramic capacitors)
- Total solution size < 13 mm2
- Available in a 2 mm × 2 mm WSON package
The TPS61240-Q1 device is a high efficient synchronous step up DC-DC converter optimized for products powered by either a three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-Polymer battery. The TPS61240-Q1 supports output currents up to 450 mA. The TPS61240-Q1 has an input valley current limit of 500 mA.
TPS61240-Q1 device provides fixed output voltage of 5V-typ with an input voltage range of 2.3 V to 5.5 V and the device supports batteries with extended voltage range. During shutdown, the load is completely disconnected from the battery. The TPS61240-Q1 boost converter is based on a quasi-constant on-time valley current mode control scheme.
The TPS61240-Q1 presents a high impedance at the VOUT pin when shut down. This allows for use in applications that require the regulated output bus to be driven by another supply while the TPS61240-Q1 is shut down.
During light loads the device will automatically pulse skip allowing maximum efficiency at lowest quiescent currents. In the shutdown mode, the current consumption is reduced to less than 1 µA.
TPS61240-Q1 allows the use of a small inductor and capacitors to achieve a small solution size. The TPS61240-Q1 is available in a 2 mm × 2 mm WSON package.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS61240-Q1 3.5-MHz High Efficiency Step-Up Converter datasheet (Rev. C) | PDF | HTML | 2020年 6月 10日 |
| Application note | QFN and SON PCB Attachment (Rev. C) | PDF | HTML | 2023年 12月 6日 | |
| User guide | Single LP8733-Q1 User's Guide to Power DRA78x and TDA3 (Rev. A) | PDF | HTML | 2021年 3月 31日 | |
| Functional safety information | TPS61240-Q1 Functional Safety, FIT Rate and Failure Mode Distribution (Rev. A) | 2020年 5月 26日 | ||
| Application note | Performing Accurate PFM Mode Efficiency Measurements (Rev. A) | 2018年 12月 11日 | ||
| Design guide | Automotive Battery to Point-of-Load Power Solution for TDA2xx Design Guide (Rev. B) | 2017年 1月 31日 | ||
| Analog Design Journal | IQ: What it is, what it isn’t, and how to use it | 2011年 6月 17日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TPS61240EVM-360 — TPS61240EVM-360 評估模組
The TPS61240EVM-260 facilitates evaluation of the TPS61240 IC. There are three circuits on the EVM:
CKT1 will demonstrate the TPS61240DRV (SON) package.
CKT2 will demonstrate the TPS61240YFF (WCSP) package in a small layout.
CKT3 will demonstrate the TPS61240YFF operating in a diode OR configuration.
Unecrypted TPS61240 PSpice Transient Model Package (Rev. A)
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WSON (DRV) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。